In circuits for electronic display and imaging applications, light emitting elements or light receiving elements are arranged either in one-dimensional or two-dimensional configurations to generate optical image patterns or to receive incident optical images. In order to generate image patterns, electrical signals from a circuit must be supplied to each light emitting element. In the case of electronic imaging units for receiving incident optical images, electrical signals from each light receiving element must be supplied to a circuit. FIG. 1 shows a simplified schematic diagram of a two-dimensional array (10). There are column electrical lines (11) each of which is connected to a column contact pad (12), and row electrical lines (13) each of them connected to a row contact pad (14). Area between two adjacent column electrical lines and two adjacent row electrical lines defines a pixel (15), which includes the region for a light emitting or light receiving element. For an electronic display, switching or emitting of light has to be done at a high speed so that the generated images are smooth and continuous to the viewers. Similarly, in an optical/X-ray scanner or imager, the switching or receiving of electrical signals has to be done at a high speed so that the received images will be smooth and continuous.
For most of the conventional electronic display products, the light switching elements are formed by liquid crystals (LC) with appropriate optical polarizers, color filters and a white light source as the backlight to form an array of light emitting elements. Other light emitting elements for the electronic display products include light emitting diodes (LED), inorganic or organic electroluminance devices (EL), and field emission devices (FED). To achieve effective switching of the light emitting elements or light switching elements, at least one thin film transistor (TFT) is constructed within the area for each pixel.
In FIG. 2, a portion of a LCD display panel (20) is shown where TFTs (21) are arranged in a two dimensional configuration on a bottom substrate (22) so that pixels in the same row can be addressed simultaneously by applying a voltage to a row electrical line (23) or gate line, which is connected to gates of all TFTs (21) in the same row. Whereas electrical signals to be supplied to or received from the pixels in the selected row are connected to or obtained from sources of these TFTs (21), through all of the column electrical lines (24) or data lines. When a TFT is selected with a gate voltage applied to the row electrical line (or gate line) (23), electrical signals can flow from the column electrical line (or data line) (24) through the source, channel, drain to a pixel electrode (25) of the light emitting element or light switching element connected, or vice versa. Here, it is noted that for simplicity not all of the elements required for a LCD are included in FIG. 2. From the above description, it becomes clear that the electrical lines supplying voltages to the gates of the TFTs (21) are often called gate lines (23). Whereas the electrical lines supplying signal voltages or currents to the pixels of light emitting or light switching elements or receiving voltages or currents from the pixels of light detecting elements are called data lines (24). A flat panel display also has a top substrate (26) to support other electrical and optical components which are not shown in FIG. 2 for simplicity. For the case of a LCD, liquid crystal is filled in the space (27) between the top substrate (26) and bottom substrate (22). A conducting and transparent top electrode (28) is deposited on the top substrate (26) facing the bottom substrate (22). In certain applications, all or part of the pixels in the flat panel array may be addressed at a time.
It should be mentioned that for displaying color images, each pixel has three sub-pixels, each for one of the principal colors: red, green and blue. In most of the conventional electronic flat panel displays, only the 2-D switching array is fabricated using TFT technology whereas standard silicon (Si) ICs are adopted as the row and column driving circuits. In order to minimize the number of electrical connections between the row and column driving circuits and the image display panel, it is desirable to form a row and a column driving circuits on the substrate where the pixels are located. In this manner, image signals can be fed in a serial manner from an external signal source to the row and column driving circuits on the display substrate for processing into substantially parallel signals for the control and switching of the pixels. In the above manner, the number of electrical connections between the external signal source or receiver circuit and the flat panel display can be reduced. To form these row and column driving circuits, a large number of TFTs are required.
In an electronic imaging unit, photovoltaic or photoconductive detectors are arranged in a two dimensional configuration as light receiving elements on a substrate to form an imaging array. When an optical image is incident onto the imaging array, electrical signals are generated by these light receiving elements. To allow a readout circuit to receive all of the electrical signals generated by the light receiving elements, TFTs are constructed in an array form with at least one TFT positioned and connected to a light receiving element. Each light receiving element and the associated TFT thus constitute a pixel in the imaging array of the electronic imaging unit. The TFTs are connected to a column and a row readout circuits so that electrical signals generated by the light receiving element due to the incident optical images can be acquired by the readout circuits for further signal processing or storage. The readout circuits may be preferably constructed on the same substrates by a group of TFTs.
As stated before, in most of the conventional electronic displays or electronic imaging units, silicon (Si) based TFTs are employed as the switching elements in the switching arrays and in certain cases the driving circuits or readout circuits. The Si technology for TFTs and circuits is based on the deposition of amorphous Si (α-Si) films or polycrystalline Si (p-Si) as the active channels for these TFTs. FIG. 3 illustrates a top view of a portion of a pixel (30) in a conventional flat panel display on a substrate (31). A data line (32) is connected to the source electrode (33) and a gate line (34) is connected to the gate electrode (35). There is a drain electrode (36) which is connected to a pixel electrode or light receiving element (37). An α-Si or p-Si channel layer (38) is deposited to overlap a portion of the source electrode (33) and a portion of the drain electrode (36) and is separated from the gate electrode (35) by a gate insulating dielectric. The source electrode (33), drain electrode (36), channel layer (38), gate electrode (35) and the insulating dielectric thus constitute a TFT on said substrate.
As mentioned before (see also FIG. 2), sources of the TFTs in a specific column of the array are connected together forming a (column) data line whereas gates of TFTs in a specific row of the array are connected together forming a (row) gate line. By applying a gate voltage to a specific row gate line and providing voltages to different data lines, specific pixels within the selected row gate line may be turned on to illuminate light or to switch on light switching elements. It is noted that TFTs in other rows of the flat display panel are not turned on so that light emitting or light switching elements in these other rows are not connected to the signals from the driving circuits. The above process may be repeated for the subsequent row gate lines in a sequential manner and with new sets of voltages applied each time for forming one frame of a complete image. To receive one frame of image in an electronic imaging unit, a gate voltage is applied to a specific row gate line and voltages (or currents) from different light receiving elements in this row are connected to and sensed by column amplifiers in readout circuits. It is noted that TFTs in other rows of the imaging array are not turned on so that light receiving elements in these other rows are not connected to the column amplifiers in the readout circuits. The light receiving process may be repeated in the electronic imaging array for the subsequent row gate lines to receive new sets of voltages for obtaining one frame of incident image. For LCD applications with a back light, a light shield (39, FIG. 3) is often applied in order to increase the contrast ratio. In this figure, a portion of the pixel electrode or light receiving element for an adjacent pixel designated as (37a) is also shown.
From the above description, it is clear that in an imaging array, the function of a pixel is opposite to the one for displays. The pixel in an imaging array consists of a device (called sensor or detector) which is sensitive to the radiation or light in an incident image to be detected. Radiation or light striking a pixel sensor will generate an electric signal with a magnitude proportional to the intensity of the radiation or light. When sensors or detectors are arranged in a two-dimensional array, the incident image striking this two-dimensional array may be retrieved electronically by having at least one TFT for each sensor or detector pixel and using a row read-out circuit and a column read-out circuit. Here, gates in all TFTs in one row of the two-dimensional array are connected together to form a row gate line whereas all sources in all TFTs in one column are connected to form a column data line. With the incident image illuminating the sensor or detector arrays and with a voltage supplied to a specific row gate line, the intensity of light in the incident image striking this row of sensor or detector array may be detected by measuring the voltage or current in each of the data lines. These voltage values will be stored in a processor and the above process is continued to a subsequent row of the sensor or detector array. By repeating the above process over the entire imaging array, storing the voltages or currents and displaying their values, the incoming image may be re-constructed. In the above imaging arrays, TFTs are often constructed using amorphous silicon (α-Si) as the active channels.
For both the flat display panels and imaging arrays, parameters of the TFTs must be controlled and optimized in order to provide performance suitable for the display or imaging applications. Among the various parameters, the most important ones are the carrier mobility in the induced channel layers, the threshold voltage and switching speed. Values of the threshold voltage will affect the design of the row and column driving circuits whereas the switching speed affects the frame rates. The mobility value of the charge carriers in the induced channel determines the capability of the TFTs in conducting electrical currents when turned on. Hence, the higher the carrier mobility, the larger the electrical current at a given gate voltage and drain voltage, and the lower the unwanted joule heating in the induced channel. For TFTs with large charge carrier mobilities, the dimensions (length and width) the TFTs required to achieve a specific ON-state current are small and the area to be occupied by the TFTs in the pixels is also small. This will allow larger fraction of the light emitting areas or light receiving areas and hence the higher display brightness of imager sensitivity.
There is often a co-relation between the carrier mobility and switching speed. In general, the higher the mobility the higher the switching speed except for certain materials containing significant amounts of traps, resulting from defects. For pixels with a fixed area and fixed distance between the bottom electrode (22) and the top electrode (28) (see FIG. 2), the current capability of the TFTs in ON state must be large enough so that RC time constant is less than that required to achieve the required frame rates. Here, C is the pixel capacitance which is proportional to the pixel area and inversely proportional to the distance between the top and bottom electrodes. For LC or LED or EL devices, the distance between the top electrode and bottom electrode is kept as small as possible so that the required ON state voltages can be small. Whereas R is the resistance of each column data line, including the resistance of the source electrode, channel layer, and drain electrode, which is proportional to the length, inversely proportional to the cross-sectional area of the column data line and the electrodes and proportional to the resistivity. The resistance of the column data lines, source electrodes and drain electrodes are determined by the materials and deposition conditions used (resistivity about 10−6 ohm-cm for common metals), the length of the column data lines is determined by the dimensions of the displays and is typically in the order of several tens to several kilo ohms for a length of 12 inches. For TFTs with large carrier mobility in the channel layers, the drain current in the ON state will be larger at a given gate voltage and a drain voltage. Hence, the resistance between the drain and source of a TFT, which is in series with a corresponding column data line, is smaller. With a smaller total resistance, the RC time constant for a given pixel capacitance will be smaller, resulting in a faster switching of the pixel from ON state to OFF state or from OFF state to ON state.
Conventional electronic displays and imaging arrays are based on an α-Si switching TFT array, CMOS column and row driving circuits or even readout circuits. The active channel layers of these TFTs are amorphous silicon (α-Si) which is commonly deposited by a vacuum method on glass substrates. The field effect carrier mobility in α-Si film deposited at low substrate temperatures (<200° C.) is quite low. It is noted that field effect mobility is the mobility of charge carriers under the influence of an electric field, applied through the gate insulator layer for the case of a TFT and substantially perpendicular to the direction of charge carrier motion. In order to obtain α-Si TFTs of sufficient performance, the deposition of the α-Si channel layers is often performed at substrate temperatures above 250° C. Typical TFTs in industrial display production based on α-Si have a field effect mobility in the range of 0.4 to 0.7 cm2/V-sec. Motivated by the need of high charge carrier field effect mobilities of the channel layers, various research work has been carried out and reported on the deposition of polycrystalline silicon (p-Si) as the channel layers for the TFTs. Although the mobility can be increased substantially (mobility values>100 cm2/V-sec have been reported), the deposition of p-Si is often carried out at substrate temperatures higher than 450° C. It is possible to perform deposition of p-Si at a reduced temperature of about 300° C., however, the mobility will be significantly smaller, about 10 times less [Jin Jang, Jai Ryu, Soo Young Yoon and Jyung Ha Lee, “Low temperature polycrystalline silicon thin film transistors” Vacuum, volume 51, number 4, pages 769–775, 1998]. It is thus evident that TFTs based on Si channel layers required deposition substrate temperatures above 250° C. Although it is possible to deposit the Si-based channel layers at a substrate temperature below 200° C., the charge carrier mobility will be less than 0.4 cm2/V-sec, at least for α-Si TFTs.
From the above comments, it is clear that it will be advantageous to develop new TFT materials or structures which can yield charge carrier field effect mobility greater than 1 cm2/V-sec without the need of elevated substrate temperatures during the channel layer deposition. The low substrate temperatures may reduce the power consumption and processing time and allow the TFTs and circuits to be fabricated on substrates other than glass, such as flexible substrates having low glass transition temperatures.
Due to the relatively small energy gaps of α-Si or p-Si materials (between 1.1 eV and 1.8 eV), the channel layers of Si-based TFTs are rather sensitive to external illumination, due to optical absorption. Electron-hole pairs are generated upon optical absorption and these charge carriers drift along the channels layer when a drain voltage is applied. This current flows even without applying a voltage to the gate. Hence, proper light shields must be provided. Using large energy gap semiconductors (3.3 eV or greater) such as the indium oxide-based channel layers according to this invention, the TFTs fabricated are not as sensitive to room light. Therefore, the requirements for light shields will not be as severe as the conventional Si-based TFTs.
In various electronic displays and imaging applications, it is desirable to fabricate the switching arrays, driving circuits or readout circuits on flexible substrates, such as plastic sheets. The glass transition temperatures of plastic sheets currently available in industry are relatively low. There are plastic materials with high glass transition temperatures, however, these require special substrate preparation processes and the cost is usually high. During the deposition of α-Si or p-Si thin films for TFTs, the substrate temperatures are rather high (more than 250° C.) in order to obtain high charge carrier field effect mobility. At the elevated temperatures, most of the plastic substrates will deform or decompose, leading to severe degradation of the deposited thin films for TFTs and circuits.
There have been some reports on the development of TFTs with ZnO as the channel layers [Satoshi Masuda, Ken Kitamura, Yoshihiro Okumura, Shigehiro Miyatake, Hitoshi Tabata and Tomoji Kawai, “Transparent thin film transistors using ZnO as an active channel layer and their electrical properties, Journal of Applied Physics, volume 93, number 3, pages 1624–1630, 2003; R. L. Hoffman, B. J. Norris and J. F. Wager, “ZnO-based transparent thin-film transistors”, Applied Physics Letters, volume 82, number 5, pages 733–735, 2003]. In such TFTs, the ZnO layers were deposited by vacuum deposition or spin coating. ZnO-based TFTs with mobility greater than 1 cm2/V-sec at low substrate temperatures have been reported. However, these devices may not be stable thermally due to defects involved in ZnO thin films. Furthermore, these TFTs may not be chemically stable enough for circuit applications.
If thermally and chemically stable thin films of large energy gap semiconductors can be deposited at low substrate temperatures and with high enough charge carrier field effect mobilities, these thin films will find applications in TFT circuits for electronic displays, imaging arrays and various electronic systems requiring large area electronic circuits.